Abstract:
Designing RTOS for multiprocessor based system and partitioning the design into
hardware and software is the paradigm for the high-end systems evolving to support
computation-intensive applications. In this thesis, RTOS is presented that is amalgam of
distributed software scheduler and dynamically scalable hardware switch capable of
performing all kernel tasks in real time and at wire speed and consequently, minimizing
software related scheduling overheads and optimizing resource utilization. Key
components of the research output are software framework for mapping high density media
applications on multiprocessor based system, its corresponding multilevel scheduler design
and design of programmable hardware switch to optimize resource utilization and enhance
system performance.
In the developed multiprocessor based system, heterogeneous multiprocessors are arranged
as Arrays of inter-connected pipelines giving rise to a modified pool-of-pipelines
architecture or two dimensional tightly coupled matrix architecture, having scalable,
distributed processing and memory capabilities through a plurality of processing elements.
The hardware software distributed architecture improves the application optimization,
mapped on this multiprocessor based system, by enhancing execution time and minimizing
processor idle time, while reducing design complexity and interface problems. RTOS
architecture exploits parallelism both in the system application environment and in the
distributed computing occurring in the hardware. Based on the type of service, the
processes are divided into sub tasks and distributed onto multiple Processors, which are
programmed to operate on a set of data, in a certain sequence and in a particular time slot.
- 7 -The sequence is maintained by the instruction format of hardware RTOS and the time slot
is predicted by the configurations set by the user.
Application pipelining framework is presented in the software part of RTOS to exploit
parallelism in media application, based on the concept of components or task model,
similar to instruction pipelining in the Processor. To meet the constraints and
characteristics of the defined framework, two level scheduling policy is adapted. Fixed-
Priority Preemptive scheduling algorithm is used at the First-level. For Second-level
various scheduling algorithms have been evaluated and analyzed offline and implemented
in the software. Heuristic based algorithm is recommended as Second-level algorithm for
media application to maintain QoS. The hardware RTOS, called Switch, is implemented as
a programmable processor with dedicated program cache. It performs all RTOS kernel
tasks in real time and facilitates inter-processor exchange of data, communication or
synchronization, deadlock avoidance and exchange of data with external shared memory,
thus, enhancing performance and minimizing Processors idle time. The RTOS supports
hardware scalability to cater for high to very high density applications and incorporates
scalable scheduling and resource management